@sammme

I’m officially working on my SystemVerilog. I finished the ALU, PC Register, and the Register File, with tests for all of them using AMD Vivado (I plan on flashing to an Artix 7). They have a cool new dark mode, which is way easier on my eyes. I’ve also done a lot of research, specifically on the DMAC, which I plan to add. It’s basically a really small and specialized mini-core of sorts, and its sole purpose is to read from storate and write to memory, then interrupt, and vice versa (this way, the CPU doesn’t waste millions of cycles for the slow hard drive). I’ve already thought about how I want to make mine, and have started drawing one out.

I’ve officially finished the emulator for my CPU!
It also includes many debug tools that make developing on my ISA/CPU much easier. The assembler rewrite also supports directives, list files, and is faster overall. You can try it on the web (just a quick emscripten, prob very buggy): https://sam32.samhithe.dev/

I made the Assembler for my CPU!
The assembler takes assembly instructions and turns it into actual machine code!
I know I said I would work on the SystemVerilog, but I needed a way to test everything first, so I need an emulator and an assembler first…

I finished my CPU design!
I used Digital by Hneemann to wireframe my 32-bit CPU out, the next step is SystemVerilog!