mos65xx emulator
- 2 Devlogs
- 6 Total hours
a (not so) simple emulator for mos 65xx family
**note: cover photo taken from wikipedia, its the mos 6502 processor die (https://en.wikipedia.org/wiki/MOS_Technology_6502#/media/File:MOS_6502_die.jpg)
devlog #2 => initial cpu core
implemented the first functional version of the CPU core
- added 8bit registers and 16bit program cointer
- added status register with bit masks
- added memory read/write interface with 64 kb of memory space
- added initial ‘LDA’ implementation
- added reset vector handling
- added basic instruction fetch and opcode dispatch
- added test suite in main function to test the functional
currently, the core architecture is kinda of working, failing mosts tests i made (the tests could be wrong lol). even if it was working, still it is incomplete, more instruction, addressing modes, accurate flags, cycle timing, interrupts and variant-specific behavior remain to be implemented.
devlog #1 - not yet working
added basic cpu intialization, memory read/write functions and hardware reset using $FFFC/$FFFD reset vector.
